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Fault tolerance in the Tricon is achieved through a Triple-Modular Redundant (TMR) architecture.
The Tricon provides error-free, uninterrupted control in the presence of either hard failures of components, or transient faults from internal or external sources. The Tricon is designed with a fully triplicated architecture throughout, from the input modules, through the Main Processors, to the output modules. Every I/O module contains the circuitry for three independent legs. Each leg on the input modules reads the process date and passes that information to its respective Main Processor. The three Main Processors communicate with each other over the chassis backplane using a proprietary high-speed bus system called the Tribus. Once per scan, the three Main Processors synchronize and communicate with their two neighbors over the Tribus. The Tribus votes digital input date, compares output date, and sends copies of analog input date to each Main Processor. The Main Processors execute the control program and sens outputs generated by the control program to the output modules. In addition to voting the input date, the Tricon votes the output data. This is done on the output modules as close to the field as possible, to detect and compensate for any errors that could occur between the Tribus voting and the final output driven to the fiels. For each I/O Module, the system can support an optional hot-spare module which takes control if a fault is detected on the primary module during operation. The hot-spare position can also be used for on-line system repairs. |
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